warp.h File Reference

Backend-neutral warp/wavefront shuffle and ballot primitives. More...

#include "backend/api.h"
#include <cstdint>

Go to the source code of this file.

Namespaces
namespace	fz

Functions
uint32_t	fz::backend::ballotSync32 (int pred)
bool	fz::backend::anySync32 (int pred)

Detailed Description

Backend-neutral warp/wavefront shuffle and ballot primitives.

CUDA warps are 32 lanes; AMD CDNA wavefronts (MI100/gfx908) are 64. Code written for CUDA's __shfl_*_sync/__ballot_sync falls into two failure modes when ported naively to HIP:

1. Mask width. HIP's mask parameter is template-deduced and requires an 8-byte integral type (static_assert(sizeof(MaskT) == 8)), so a bare 0xffffffffu (4 bytes) is a hard compile error, not a silent truncation. kFullMask below is the right width for each backend.
2. Implicit width. __shfl_*_sync's width parameter defaults to warpSize, which is 32 under CUDA but 64 under HIP. Code that omits width and relies on that default silently changes which lanes participate — verified on MI100 hardware: a __shfl_down_sync with a 32-lane grouping intent but no explicit width reads across the wrong lane boundary once compiled for a 64-wide wavefront. The width parameter is required here (no default) so this can't happen silently at a call site again.

shflUp/Down/Xor/plain are width-only — the mask is functionally inert for these under HIP (it only feeds a debug-only convergence assert, compiled out under -DNDEBUG), so kFullMask is always correct to pass regardless of the caller's actual lane grouping.

ballotSync32/anySync32 are different: cub/CUDA code that packs a __ballot_sync result into a 32-bit wire-format bitmask assumes the lowest 32 bits are the answer. Under HIP that's only true for the lower half of the wavefront — verified on MI100 hardware that the upper 32 lanes' ballot bits land at [32:63], not auto-normalized to [0:31]. These two functions restrict to the caller's own 32-lane half (by hardware lane id, not any software-derived index) and normalize the result back to [0:31], so callers get exactly what CUDA's native 32-lane __ballot_sync already returned.

Requires -DHIP_ENABLE_WARP_SYNC_BUILTINS (set globally for the HIP backend in the root CMakeLists.txt) — ROCm does not declare __shfl_*_sync/__ballot_sync/__any_sync at all without it.

Function Documentation

ballotSync32()

uint32_t fz::backend::ballotSync32 ( int  pred )

inline

32-lane-sub-group ballot, normalized to bits [0:31] regardless of which hardware half of a 64-lane wavefront the calling lane sits in.

anySync32()

bool fz::backend::anySync32 ( int  pred )

inline

32-lane-sub-group __any_sync — true if pred is true for any lane in the caller's own 32-lane half of the wavefront.